Electro What?

A table showing the Alpha chip's processor designs and corresponding process technologies.

Aaron Sakovich

December 31, 1998

2 Min Read
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A popular myth that explains how Alpha chips got the nickname EV describes how engineers decided during lunch one day to excite a pickle to the frequencies at which Alpha chips run. The engineers plugged the pickle in to a pair of electrodes. The pickle glowed green, and from then on Alphas had the nickname Electro Vlasic, or EV for short.

Unfortunately, the truth isn't so amusing. Digital's original plan
for the Alpha processor, even before it had the name Alpha, was to replace the company's venerable CISC architecture, the VAX. Digital planned to provide an extension to the VAX family that would carry the product line into the next century. Some Digital employees took advantage of this opportunity to create a processor with no historical baggage or hardware emulation, and after the project was partially finished, Digital scrapped the Extended VAX (EV) plan and began to design a new chip. The only portions of the original project that the new chip retained are VAX floating-point compatibility (which is available in addition to the standard Institute of Electrical and Electronics Engineers--IEEE--floating-point format) and the EV designation.

The first number that follows EV in Alpha chips' designations identifies the processors' generation. (I haven't heard Digital's solution to the nomenclature of processors beyond the Alpha's ninth generation.) If a second digit appears after EV in a processor's name, it denotes that the chip has a more advanced process technology than the first chip of that Alpha generation. Table A shows the Alpha's processor designs and corresponding process technologies.

TABLE A: Alpha Processors and Features

Designation

Processor

Process Technology (microns)

Speed Range (MHz)

Special Features

LCA4

21066

0.75

166

Low-cost Alpha (LCA)

LCA4S

21068

0.75

>66

LCA45

21066a

0.50

233

EV4

21064

0.75

100 to 200

Original dual-issue Alpha

EV45

21064a

0.50

225 to 300

Level 1 cache doubled

EV5

21164

0.50

250 to 366

Quad-issue

EV56

21164*

0.35

400 to 767

Byte and word instruction alignment

PCA56

21164PC

0.35

400 to 600

Level 2 cache removed; motion video instructions (MVI) added

PCA57

21164PCa

0.25

667

Announced in February 1998; not available at press time

EV6

21264

0.35

450 to 600

Hex issue, speculation, and branch prediction

EV67

21264a

0.25

800

EV68

21264b

0.18

1000

EV7

21364

0.25

1200

On-chip cross-bar switching

EV8

21464

0.18

On-chip Symmetric Multiprocessing (SMP)?

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