JSI Tip 1326. Improving Serial Communications performance.

ForceFifoEnable

 A 1 enables FIFO (First In First Out buffer on your UART chip), a 0 disables it. If you want to enable FIFO for selected Serial ports, add these Value Names to the Parameters/Serial# sub-keys instead. 

LogFifo

 A 1 enables FIFO notification at start up, a 0 does not. 

PermitShare

 A 1 allows Serial ports to use the same IRQ. 

RxFIFO

 Using the Decimal Radix, set the number of character that the FIFO receive buffer can accumulate before generating an interrupt. The default is 8 and the maximum is 14. If you do not have a very fast processor, limit this number to 12. 

TxFIFO

 Using the Decimal Radix, set the number of character that the FIFO Transmit buffer can accumulate before generating an interrupt. The default is 1 and the maximun is 16. 16 works well on a dual processor or a fast uni-processor.